3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

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3 V、LVDS、四通道、CMOS差分線路接收器

ADN4666是一款四通道、CMOS、低壓差分信號(LVDS)線路接收器，提供400 Mbps (200 MHz)以上的數(shù)據(jù)速率，功耗超低。\n\n????? 該器件接受低壓（典型值350 mV）差分輸入信號，并將其轉換為單端3 V TTL/ CMOS邏輯電平。\n\n??????? ADN4666還提供高電平有效和低電平有效使能/禁用輸入（EN和EN)，用來控制所有四個接收器。這些輸入可禁用接收器，將輸出切換至高阻抗狀態(tài)。因此，一個或多個ADN4666器件的輸出可以多路復用，將靜態(tài)功耗降至典型值10 mW。\n\n???? ADN4666及其配套驅動器ADN46 ? 接收器輸入引腳提供±8 kV ESD IEC 61000-4-2接觸放電保護\n\n? 轉換速率：400 Mbps (200 MHz)\n\n? 通道間偏斜：100 ps（典型值）\n\n? 差分偏斜：100 ps（典型值）;

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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Package：16-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 驅動器，接收器，收發(fā)器 描述：IC RECEIVER 0/4 16TSSOP

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Package：16-SOIC（0.154"，3.90mm 寬）；包裝：管件 類別：集成電路（IC） 驅動器，接收器，收發(fā)器 描述：IC RECEIVER 0/4 16SOIC

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Package：16-SOIC（0.154"，3.90mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 驅動器，接收器，收發(fā)器 描述：IC RECEIVER 0/4 16SOIC

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