Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：478.05 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：478.05 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：478.05 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：409.83 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice

文件：409.25 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice

文件：409.25 Kbytes 頁數(shù)：28 Pages

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Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：409.83 Kbytes 頁數(shù)：28 Pages

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亞德諾

Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery

GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming

文件：409.83 Kbytes 頁數(shù)：28 Pages

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亞德諾

Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice

文件：409.25 Kbytes 頁數(shù)：28 Pages

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Package：32-WFQFN 裸露焊盤，CSP；包裝：散裝 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC CLOCK/DATA RECOVERY 32LFCSP

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