ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC

1 Features ? Dual channel ADC ? 18-bit 10, 25, 65 MSPS ADC ? Noise floor: -160 dBFS/Hz ? Low power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS) ? Latency: 1-2 clock cycles ? 18-bit, no missing codes ? INL/DNL: ±7/ ±0.7 LSB (typical) ? Reference: external or intern

文件：5.67705 Mbytes 頁數(shù)：85 Pages

TI

德州儀器

ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC

1 Features ? Dual channel ADC ? 18-bit 10, 25, 65 MSPS ADC ? Noise floor: -160 dBFS/Hz ? Low power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS) ? Latency: 1-2 clock cycles ? 18-bit, no missing codes ? INL/DNL: ±7/ ±0.7 LSB (typical) ? Reference: external or intern

文件：5.98943 Mbytes 頁數(shù)：91 Pages

TI

德州儀器

ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC

文件：4.43597 Mbytes 頁數(shù)：73 Pages

TI

德州儀器

ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC

文件：5.03782 Mbytes 頁數(shù)：75 Pages

TI

德州儀器

ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC

文件：5.01183 Mbytes 頁數(shù)：75 Pages

TI

德州儀器