IF Digitizing Subsystem

GENERAL DESCRIPTION The AD9874 is a general-purpose IF subsystem that digitizes a low level 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9874 consists of a low noise amplifier, a mixer, a band-pass sigma-delta analog-to-digital co

文件：744.99 Kbytes 頁數(shù)：40 Pages

AD

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IF Digitizing Subsystem

文件：580.04 Kbytes 頁數(shù)：40 Pages

AD

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IF Digitizing Subsystem

文件：710.76 Kbytes 頁數(shù)：41 Pages

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低功耗中頻數(shù)字化子系統(tǒng)

AD9874是一款通用中頻子系統(tǒng)，可對帶寬最高至270 kHz的低電平10至300 MHz中頻輸入信號進行數(shù)字處理。AD9874的信號鏈包括一個低噪聲放大器、混頻器、一個帶通Σ-Δ型模數(shù)轉(zhuǎn)換器以及一個具有可編程抽取系數(shù)的抽取濾波器。自動增益控制(AGC)電路提供12 dB的連續(xù)增益調(diào)整。\n\n 高動態(tài)范圍和帶通Σ-Δ型轉(zhuǎn)換器內(nèi)在的抗混疊功能，使該器件能處理比目標(biāo)信號強度高達95 dB的阻塞信號。除串行外設(shè)接口端口外，輔助模塊還包括時鐘和LO頻率合成器。\n\n 通過SPI端口可對AD9874的許多參數(shù)進行編程，因此該器件可針對特定應(yīng)用進行優(yōu)化?？删幊虆?shù)包括：頻率合成器分 ? 輸入頻率：10至300 MHz\n\n? 基帶(I/Q)數(shù)字輸出\n\n? 電源電壓：2.7 V至3.6 V\n\n? 輸出信號帶寬：10至270 KHz\n\n? 單邊帶噪聲系數(shù)（SSB NF）：8 dB;

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IF Digitizing Subsystem

GENERAL DESCRIPTION The AD9874 is a general-purpose IF subsystem that digitizes a low level 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9874 consists of a low noise amplifier, a mixer, a band-pass sigma-delta analog-to-digital co

文件：744.99 Kbytes 頁數(shù)：40 Pages

AD

亞德諾

IF Digitizing Subsystem

GENERAL DESCRIPTION The AD9874 is a general-purpose IF subsystem that digitizes a low level 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9874 consists of a low noise amplifier, a mixer, a band-pass sigma-delta analog-to-digital co

文件：744.99 Kbytes 頁數(shù)：40 Pages

AD

亞德諾

IF Digitizing Subsystem

文件：580.04 Kbytes 頁數(shù)：40 Pages

AD

亞德諾

IF Digitizing Subsystem

文件：710.76 Kbytes 頁數(shù)：41 Pages

AD

亞德諾

IF Digitizing Subsystem

文件：580.04 Kbytes 頁數(shù)：40 Pages

AD

亞德諾

IF Digitizing Subsystem

文件：580.04 Kbytes 頁數(shù)：40 Pages

AD

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