Low Power, Buffered 24-Bit Sigma-Delta ADC

GENERAL DESCRIPTION The AD7791 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 24-bit ∑-? ADC with one differential input that can be buffered or unbuffered. FEATURES Power Supply: 2.5 V to 5.25 V operation Normal

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Devices Connected

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Low Power, Buffered 24-Bit Sigma-Delta ADC

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4位、單通道、超低功耗Σ-Δ型ADC

AD7790/AD7791均為適合低頻測量應用的低功耗、完整模擬前端。采用3 V電源時，二者的典型功耗為65 μA；采用5 V電源、禁用緩沖時，典型功耗為75 μA。AD7791內(nèi)置一個24位Σ-Δ ADC，其中含有一個可緩沖或無緩沖差分輸入。AD7790是AD7791的16位版本。AD7790在默認輸出數(shù)據(jù)速率16.6 Hz時具有16位峰－峰值分辨率，而AD7789在此輸出數(shù)據(jù)速率時則具有19位峰－峰值分辨率，相當于21.5位有效分辨率。\n\n AD7791采用內(nèi)部時鐘工作，因此，用戶不必為其提供時鐘源。輸出數(shù)據(jù)速率可通過軟件編程設置，可在9.5 Hz至120 Hz的范圍內(nèi)變化。 ? 下載示例代碼\n\n? 電源：\n- 工作電壓：2.5 V至5.25 V\n- 正常模式：最大75 μA\n- 省電模式：最大1 μA\n\n? 均方根（RMS）噪聲：1.1 μV\n（9.5 Hz更新速率時）\n\n? 19.5位峰－峰值分辨率（22位有效分辨率）\n\n? 積分非線性：3.5 ppm（典型值）;

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Low Power, Buffered 24-Bit Sigma-Delta ADC

GENERAL DESCRIPTION The AD7791 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 24-bit ∑-? ADC with one differential input that can be buffered or unbuffered. FEATURES Power Supply: 2.5 V to 5.25 V operation Normal

文件：308.18 Kbytes 頁數(shù)：20 Pages

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Low Power, Buffered 24-Bit Sigma-Delta ADC

GENERAL DESCRIPTION The AD7791 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 24-bit ∑-? ADC with one differential input that can be buffered or unbuffered. FEATURES Power Supply: 2.5 V to 5.25 V operation Normal

文件：308.18 Kbytes 頁數(shù)：20 Pages

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Low Power, Buffered 24-Bit Sigma-Delta ADC

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Low Power, Buffered 24-Bit Sigma-Delta ADC

文件：525.81 Kbytes 頁數(shù)：21 Pages

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Low Power, Buffered 24-Bit Sigma-Delta ADC

文件：525.81 Kbytes 頁數(shù)：21 Pages

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Low Power, Buffered 24-Bit Sigma-Delta ADC

文件：525.81 Kbytes 頁數(shù)：21 Pages

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