24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs

GENERAL DESCRIPTION The AD7767/AD7767-1/AD7767-2 are high performance 24-bit oversampled SAR analog-to-digital converters (ADC). The AD7767/AD7767-1/AD7767-2 combine the benefits of a large dynamic range and input bandwidth, consuming 15 mW, 10.5 mW, and 8.5 mW power, respectively, all containe

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2.5 MSPS, 20-Bit ADC

GENERAL DESCRIPTION The AD7760 is a high performance, 24-bit Σ-Δ analog-to-digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion to achieve a performance of 100 dB SNR at 2.5 MSPS, making it ideal for high speed data acquisition. Wide dynamic

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AD7760/AD7762 Evaluation Board using EVAL-CED1Z

FEATURES Full-featured evaluation board for the AD7760/AD7762 EVAL-CED1Z compatible On-board 4.096 V reference Crystal clock oscillator MCLK source PC software for control and data analysis for use with EVAL-CED1Z Filter Programmability – Load custom filter to AD7760/62 EVALUATION BOARD

文件：2.10058 Mbytes 頁數(shù)：23 Pages

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24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs

FEATURES ? Oversampled successive approximation (SAR) architecture ? High performance ac and dc accuracy, low power ? 115.5 dB dynamic range, 32 kSPS (AD7767-2) ? 112.5 dB dynamic range, 64 kSPS (AD7767-1) ? 109.5 dB dynamic range, 128 kSPS (AD7767) ? ?118 dB THD ? Exceptionally low power

文件：4.112939 Mbytes 頁數(shù)：23 Pages

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Sigma-Delta ADC with On-Chip Buffer

文件：851.26 Kbytes 頁數(shù)：37 Pages

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24位、2.5 MSPS、100 dB Σ-Δ型ADC，內(nèi)置片內(nèi)緩沖

AD7760是一款高性能、24位Σ-Δ型模數(shù)轉(zhuǎn)換器（ADC），融合了寬輸入帶寬、高速特性與Σ-Δ轉(zhuǎn)換技術(shù)的優(yōu)勢，2.5 MSPS時(shí)信噪比可達(dá)100 dB，因此非常適合高速數(shù)據(jù)采集應(yīng)用。寬動(dòng)態(tài)范圍以及顯著降低的抗混疊要求，使設(shè)計(jì)過程得以簡化。AD7760內(nèi)置用來驅(qū)動(dòng)基準(zhǔn)電壓的緩沖、用于信號緩沖和電平轉(zhuǎn)換的差動(dòng)放大器、超量程標(biāo)志、內(nèi)部增益與失調(diào)寄存器以及低通數(shù)字FIR濾波器，是一款高度集成的緊湊型數(shù)據(jù)采集器件，只需選擇極少的外圍元件。此外，該器件提供可編程抽取率，而且如果數(shù)字FIR濾波器的默認(rèn)特征不適合應(yīng)用要求，還可對其進(jìn)行調(diào)整。AD7760是要求高信噪比（SNR）且無需采用復(fù)雜的前端信號處理設(shè)計(jì) ? 78 kHz輸出數(shù)據(jù)速率時(shí)，動(dòng)態(tài)范圍為120 dB\n\n? 2.5 MHz輸出數(shù)據(jù)速率時(shí)，動(dòng)態(tài)范圍為100 dB\n\n? 78 kHz輸出數(shù)據(jù)速率時(shí)，信噪比（SNR）為112 dB\n\n? 2.5 MHz輸出數(shù)據(jù)速率時(shí)，信噪比（SNR）為100 dB\n\n? 最大完全濾波輸出字速率：2.5 MHz\n\n? 全差分調(diào)制器輸入\n\n? 可編程過采樣率（8×～256×）\n\n? 片內(nèi)差分放大器，用于信號緩沖\n\n? 低通有限脈沖響應(yīng)（FIR）濾波器，具有默認(rèn)的或用戶可編程系數(shù)\n\n? 調(diào)制器輸出模式\n\n? 超量程提醒位\n\n? 數(shù)字偏置與增益校正寄存器;

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2.5 MSPS, 20-Bit ADC

GENERAL DESCRIPTION The AD7760 is a high performance, 24-bit Σ-Δ analog-to-digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion to achieve a performance of 100 dB SNR at 2.5 MSPS, making it ideal for high speed data acquisition. Wide dynamic

文件：868.49 Kbytes 頁數(shù)：22 Pages

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2.5 MSPS, 20-Bit ADC

GENERAL DESCRIPTION The AD7760 is a high performance, 24-bit Σ-Δ analog-to-digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion to achieve a performance of 100 dB SNR at 2.5 MSPS, making it ideal for high speed data acquisition. Wide dynamic

文件：868.49 Kbytes 頁數(shù)：22 Pages

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2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer

文件：958.57 Kbytes 頁數(shù)：37 Pages

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Sigma-Delta ADC with On-Chip Buffer

文件：851.26 Kbytes 頁數(shù)：37 Pages

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