Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：142.06 Kbytes 頁數(shù)：16 Pages

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Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：134.55 Kbytes 頁數(shù)：16 Pages

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Dual Sigma-Delta ADC with Auxiliary DAC

文件：177 Kbytes 頁數(shù)：17 Pages

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帶有輔助DAC的3 V、雙Σ-Δ型ADC

AD7729是一款低功耗、雙通道、帶有信號(hào)調(diào)理功能的輸入端口的單片3 V CMOS器件，接收路徑由兩個(gè)帶有數(shù)字濾波功能的高性能Σ-Δ ADC組成，兩個(gè)ADC共用一個(gè)帶隙基準(zhǔn)電壓源。該器件內(nèi)置一個(gè)控制DAC，用于執(zhí)行AGC等功能，可通過輔助端口（ASPORT）使用這些輔助功能，最大輸出字速率是270 kHz。\n\n 該器件采用28引腳TSSOP封裝和28引腳SOIC封裝。 ? +3 V工作電壓\n\n? 基帶串行端口（BSPORT）\n\n? 差分IRx和QRx\n\n? 輔助數(shù)模轉(zhuǎn)換器（DAC）\n\n\n\n? 輔助串行端口（ASPORT）\n\n? 片內(nèi)基準(zhǔn)電壓\n\n? 低功耗\n\n? 28引腳TSSOP/28引腳SOIC\n\n? ADC通道\n- 兩個(gè)15位Σ-Δ模數(shù)轉(zhuǎn)換器\n- FIR數(shù)字濾波器\n- 信噪比64 dB\n- 輸出字速率270.83 kHz\n- 二進(jìn)制補(bǔ)碼編碼\n- 片內(nèi)失調(diào)校準(zhǔn)\n- 省電模式;

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Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：134.55 Kbytes 頁數(shù)：16 Pages

AD

亞德諾

Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：142.06 Kbytes 頁數(shù)：16 Pages

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亞德諾

Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：142.06 Kbytes 頁數(shù)：16 Pages

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亞德諾

Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：134.55 Kbytes 頁數(shù)：16 Pages

AD

亞德諾

Dual Sigma-Delta ADC with Auxiliary DAC

GENERAL DESCRIPTION This monolithic 3 V CMOS device is a low power, two-channel, input port with signal conditioning. The receive path is composed of two high performance sigma-delta ADCs with digital filtering. A common bandgap reference feeds the ADCs. FEATURES +3 V Supply Voltage

文件：134.55 Kbytes 頁數(shù)：16 Pages

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Dual Sigma-Delta ADC with Auxiliary DAC

文件：146.03 Kbytes 頁數(shù)：16 Pages

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