3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs

GENERAL DESCRIPTION The AD7705/AD7706 are complete analog front ends for low frequency measurement applications. These 2-/3-channel devices can accept low level input signals directly from a transducer and produce serial digital output. The devices employ a Σ-Δ conversion technique to realize up

文件：264.11 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs

FEATURES AD7705: 2 fully differential input channel ADCs AD7706: 3 pseudo differential input channel ADCs 16 bits no missing codes 0.003% nonlinearity Programmable gain front end: gains from 1 to 128 3-wire serial interface SPI?-, QSPI?-, MICROWIRE?-, and DSP-compatible Schmitt-trigger

文件：395.25 Kbytes 頁數(shù)：44 Pages

AD

亞德諾

3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs

文件：401.94 Kbytes 頁數(shù)：44 Pages

AD

亞德諾

3 V/5 V, 1 mW, 2-/3-Channel

文件：395.77 Kbytes 頁數(shù)：44 Pages

AD

亞德諾

3V/5V、1 MW、雙通道差分、16位Σ-Δ型ADC

AD7705和AD7706均為完整16位、低成本、Σ-Δ型ADC，適合直流和低頻交流測量應用。其具有低功耗（3 V時最大值為1 mW）特性，因而可用于環(huán)路供電、電池供電或本地供電的應用中。片內(nèi)可編程增益放大器提供從1至128的增益設置，無需使用外部信號調(diào)理硬件便可接受低電平和高電平模擬輸入。\n\n AD7705擁有兩個差分通道，而AD7706則擁有一個差分通道和兩個偽差分通道。在定制比率應用器件時，差分基準電壓輸入還能提供極大的靈活性。 ? 兩個全差分輸入通道ADC\n\n? 可編程增益前端\n增益范圍從1至128\n\n? 三線串行接口\nSPI?, QSPI?, MICROWIRE?, DSP 兼容\nSCLK上可接受施密特觸發(fā)器輸入\n\n? 提供模擬輸入緩沖;

ADI

亞德諾

3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs

GENERAL DESCRIPTION The AD7705/AD7706 are complete analog front ends for low frequency measurement applications. These 2-/3-channel devices can accept low level input signals directly from a transducer and produce serial digital output. The devices employ a Σ-Δ conversion technique to realize up

文件：264.11 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs

GENERAL DESCRIPTION The AD7705/AD7706 are complete analog front ends for low frequency measurement applications. These 2-/3-channel devices can accept low level input signals directly from a transducer and produce serial digital output. The devices employ a Σ-Δ conversion technique to realize up

文件：264.11 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs

GENERAL DESCRIPTION The AD7705/AD7706 are complete analog front ends for low frequency measurement applications. These 2-/3-channel devices can accept low level input signals directly from a transducer and produce serial digital output. The devices employ a Σ-Δ conversion technique to realize up

文件：264.11 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs

文件：401.94 Kbytes 頁數(shù)：44 Pages

AD

亞德諾

3 V/5 V, 1 mW, 2-/3-Channel

文件：395.77 Kbytes 頁數(shù)：44 Pages

AD

亞德諾