500 KSPS、16位差分PULSAR? ADC，采用μSOIC或QFN封裝

AD7688是一款16位、500 kSPS、電荷再分配、逐次逼近型模數(shù)轉(zhuǎn)換器（ADC），采用5 V單電源（VDD）供電。該器件內(nèi)置一個(gè)極低功耗、高速、16位無(wú)失碼采樣ADC、一個(gè)內(nèi)部轉(zhuǎn)換時(shí)鐘和一個(gè)多功能串行接口端口，還集成了一個(gè)低噪聲、寬帶寬、極短孔徑延遲的采樣保持電路。在CNV上升沿，該器件對(duì)IN+與IN-引腳之間的電壓差進(jìn)行采樣。這兩個(gè)引腳上的電壓擺幅通常在0 V至REF之間、相位相反?；鶞?zhǔn)電壓（REF）由外部提供，最高可設(shè)置為電源電壓。\n\n 功耗和吞吐量呈線性變化關(guān)系。\n\n SPI兼容串行接口還能夠利用SDI輸入，將幾個(gè)ADC以菊花鏈形式連結(jié)到單三線式總線上， ? 16位分辨率、16位無(wú)失碼\n\n? 吞吐量：500 kSPS \n\n? 積分非線性（INL）：±0.4 LSB（典型值），±1.5 LSB（最大值）\n\n? S/(N+D): 95 dB @ 20 kHz \n\n? 功耗：\n4 mW @ 100 kSPS \n4 μW @ 100 SPS \n\n? 真差分模擬輸入范圍： ±VREF 0 V ～ VREF （兩個(gè)輸入腳的VREF 最高為VDD）;

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18-Bit, 2 MSPS PulSAR 15 mW ADC in LFCSP (QFN)

GENERAL DESCRIPTION The AD7986 is an 18-bit, 2 MSPS successive approximation, analog-to-digital converter (ADC). It contains a low power, high speed, 18-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interfac

文件：472.25 Kbytes 頁(yè)數(shù)：28 Pages

AD

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14-Bit, 500 kSPS PulSAR ADC in MSOP

GENERAL DESCRIPTION The AD7946 is a 14-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：644.75 Kbytes 頁(yè)數(shù)：24 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/LFCSP

GENERAL DESCRIPTION The AD7688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：562.62 Kbytes 頁(yè)數(shù)：29 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/LFCSP

GENERAL DESCRIPTION The AD7688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：562.62 Kbytes 頁(yè)數(shù)：29 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/LFCSP

GENERAL DESCRIPTION The AD7688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：562.62 Kbytes 頁(yè)數(shù)：29 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR??Differential ADC in MSOP/QFN

GENERAL DESCRIPTION The AD7688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：437.66 Kbytes 頁(yè)數(shù)：28 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/LFCSP

GENERAL DESCRIPTION The AD7688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a v

文件：562.62 Kbytes 頁(yè)數(shù)：29 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR

文件：535.8 Kbytes 頁(yè)數(shù)：28 Pages

AD

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16-Bit, 1.5 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/QFN

文件：437.66 Kbytes 頁(yè)數(shù)：28 Pages

AD

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