16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC

GENERAL DESCRIPTION The AD7610 is a 16-bit charge redistribution successive approximation register (SAR), architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write only seria

文件：820.12 Kbytes 頁(yè)數(shù)：32 Pages

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14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC

GENERAL DESCRIPTION The AD7952 is a 14-bit, charge redistribution, successive approximation register (SAR) architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write-only serial

文件：868.1 Kbytes 頁(yè)數(shù)：32 Pages

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16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC

GENERAL DESCRIPTION The AD7612 is a 16-bit charge redistribution successive approximation register (SAR), architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write only seria

文件：818.04 Kbytes 頁(yè)數(shù)：32 Pages

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Ultralow Power, Low Distortion

GENERAL DESCRIPTION The ADA4940-1/ADA4940-2 are low noise, low distortion fully differential amplifiers with very low power consumption. They are an ideal choice for driving low power, high resolution, high performance SAR and sigma-delta (Σ-Δ) analog-to-digital converters (ADCs) with resolutio

文件：926.18 Kbytes 頁(yè)數(shù)：32 Pages

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18-Bit, 5 MSPS PulSAR Differential ADC

GENERAL DESCRIPTION The AD7960 is an 18-bit, 5 MSPS, charge redistribution successive approximation (SAR), analog-to-digital converter (ADC). The SAR architecture allows unmatched performance both in noise and in linearity. The AD7960 contains a low power, high speed, 18-bit sampling ADC, an inte

文件：814.69 Kbytes 頁(yè)數(shù)：24 Pages

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16-Bit, 1.5 LSB INL, 2 MSPS PulSAR ADC

GENERAL DESCRIPTION The AD7622 is a 16-bit, 2 MSPS, charge redistribution SAR, fully differential, analog-to-digital converter (ADC) that operates from a single 2.5 V power supply. The part contains a high speed, 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer

文件：810.95 Kbytes 頁(yè)數(shù)：28 Pages

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16-Bit, 2 LSB INL, 3 MSPS PulSAR? ADC

GENERAL DESCRIPTION The AD7621 is a 16-bit, 3 MSPS, charge redistribution SAR, fully differential analog-to-digital converter (ADC) that operates from a single 2.5 V power supply. It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error

文件：619 Kbytes 頁(yè)數(shù)：32 Pages

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16-Bit, 500 kSPS PulSAR Dual, 2-Channel, Simultaneous Sampling ADC

文件：548.57 Kbytes 頁(yè)數(shù)：28 Pages

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16-Bit, 2 LSB INL, 3 MSPS PulSAR ADC

文件：468.05 Kbytes 頁(yè)數(shù)：33 Pages

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16位、2 LSB 積分非線性（INL）、3 MSPS PulSAR? ADC

AD7621是一款16位、3 MSPS、電荷再分配SAR型、全差分模數(shù)轉(zhuǎn)換器（ADC），采用2.5 V單電源供電。該器件內(nèi)置一個(gè)16位高速采樣ADC、一個(gè)內(nèi)部轉(zhuǎn)換時(shí)鐘、一個(gè)內(nèi)部基準(zhǔn)電壓緩沖、糾錯(cuò)電路，以及串行和并行系統(tǒng)接口端口。\n\n 該器件具有三種采樣模式：極高采樣速率模式（寬帶Warp模式），適用于欠采樣應(yīng)用；快速模式（正常模式），適用于異步轉(zhuǎn)換速率應(yīng)用；低功耗模式（脈沖模式），適用于低功耗應(yīng)用，功耗與吞吐量呈比例關(guān)系。\n\n 該器件采用48引腳LQFP或48引腳LFCSP封裝，工作溫度范圍為-40°C至+85°C。 ? 16位分辨率、無(wú)失碼\n\n? 無(wú)流水線延遲（SAR架構(gòu)）\n\n? 差分輸入范圍：±VREF（VREF最高為2.5V）\n\n? 吞吐量：\n3 MSPS（寬帶Warp和Warp模式）\n2 MSPS（正常模式）\n1.25 MSPS（脈沖模式）\n\n? 積分非線性（INL）：\n最大值±2 LSB（FS為±30 ppm）\n\n? 信納比：典型值89 dB @ 100 kHz;

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