Ultralow Offset Voltage Dual Op Amp

FEATURES Very high dc precision 30 μV maximum offset voltage 0.3 μV/°C maximum offset voltage drift 0.35 μV p-p maximum voltage noise (0.1 Hz to 10 Hz) 5 million V/V minimum open-loop gain 130 dB minimum CMRR 120 dB minimum PSRR Matching characteristics 30 μV maximum offset voltage match

文件：340.99 Kbytes 頁數(shù)：16 Pages

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Ultralow Offset Voltage Dual Op Amp

FEATURES Very high dc precision 30 μV maximum offset voltage 0.3 μV/°C maximum offset voltage drift 0.35 μV p-p maximum voltage noise (0.1 Hz to 10 Hz) 5 million V/V minimum open-loop gain 130 dB minimum CMRR 120 dB minimum PSRR Matching characteristics 30 μV maximum offset voltage match

文件：340.99 Kbytes 頁數(shù)：16 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 頁數(shù)：20 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 頁數(shù)：20 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 頁數(shù)：20 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 10-Lead LFCSP and MSOP

GENERAL DESCRIPTION The AD7091R is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power suppl

文件：454.89 Kbytes 頁數(shù)：20 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 10-Lead LFCSP and MSOP

GENERAL DESCRIPTION The AD7091R is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power suppl

文件：454.89 Kbytes 頁數(shù)：20 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

GENERAL DESCRIPTION The AD7091R-2/AD7091R-4/AD7091R-8 family is a multichannel 12-bit, ultralow power, successive approximation analog-to-digital converter (ADC) that is available in two, four, or eight analog input channel options. The AD7091R-2/AD7091R-4/AD7091R-8 operate from a single 2.7 V to

文件：861.82 Kbytes 頁數(shù)：42 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

FEATURES ? Ultralow system power ? Flexible power/throughput rate management ? Normal mode ? 1.4 mW at 1 MSPS ? Power-down mode ? 550 nA typical at VDD = 5.25 V ? 435 nA typical at VDD = 3 V ? Programmable ALERT interrupt pin (4-/8-channel models) ? High performance ? 1 MSPS throughput w

文件：1.85315 Mbytes 頁數(shù)：39 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

FEATURES ? Ultralow system power ? Flexible power/throughput rate management ? Normal mode ? 1.4 mW at 1 MSPS ? Power-down mode ? 550 nA typical at VDD = 5.25 V ? 435 nA typical at VDD = 3 V ? Programmable ALERT interrupt pin (4-/8-channel models) ? High performance ? 1 MSPS throughput w

文件：1.85315 Mbytes 頁數(shù)：39 Pages

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