2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5330/AD5331/AD5340/AD53411 are single 8-/10-/12- bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the

文件：359.53 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

2.5 V to 5.5 V, 230uA, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5332/AD5333/AD5342/AD5343 are dual 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 230 μA at 3 V, and feature a power-down pin, PD that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can dr

文件：274.89 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 μA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive

文件：324.46 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 關(guān)A, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead Packages

GENERAL DESCRIPTION The AD5304/AD5314/AD53241 are quad 8-, 10-, and 12-bit buffered voltage output DACs in 10-lead MSOP and 10-lead LFCSP packages that operate from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V. Their on-chip output amplifiers allow rail-to-rail output swing to be achie

文件：357.74 Kbytes 頁數(shù)：24 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 關(guān)A, 2-Wire Interface Interface

文件：565.67 Kbytes 頁數(shù)：24 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 uA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

文件：427.29 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

2.5 V至5.5 V、500 μA、雙線式接口、四通道、電壓輸出12位DAC，采用10引腳MICROSOIC封裝

AD5305/AD5315/AD5325分別是四通道8/10/12位、緩沖電壓輸出DAC，提供10引腳microSOIC封裝，采用2.5 V至5.5 V單電源供電，3 V時(shí)功耗為500μA。這些器件內(nèi)置片內(nèi)輸出放大器，能夠提供軌到軌輸出擺幅，壓擺率為0.7 V/μs。所用的雙線式串行接口能夠以最高400 kHz時(shí)鐘速率工作。當(dāng)VDD <3.6 V時(shí)，此接口為SMBus兼容。多個(gè)器件可以共用同一總線。\n\n 產(chǎn)品特色\n\n提供10引腳MicroSOIC封裝低功耗，采用2.5 V至5.5 V單電源供電 3 V時(shí)功耗為1.5 mW，5 V時(shí)功耗為3 mW 軌到軌輸出，壓擺率為0.7 V ? 4個(gè)12位DAC，采用10引腳MicroSOIC封裝\n\n? 低功耗：600 μA （5 V），500 μA （3 V）\n\n? 關(guān)斷模式的功耗：200 nA（5 V），80 nA（3 V）\n\n? 通過設(shè)計(jì)保證單調(diào)性\n\n? 上電復(fù)位至0 V\n\n? 三種關(guān)斷功能;

ADI

亞德諾

2.5 V to 5.5 V, 500 A, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

文件：565.67 Kbytes 頁數(shù)：24 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 A, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

文件：565.67 Kbytes 頁數(shù)：24 Pages

AD

亞德諾

2.5 V to 5.5 V, 500 muA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

文件：565.67 Kbytes 頁數(shù)：24 Pages

AD

亞德諾