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          首頁(yè) >A67L9336>規(guī)格書(shū)列表

          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

          A67L9336E

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-2.6

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-2.6F

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-2.8

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-2.8F

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-3.2

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-3.2F

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-3.5

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-3.5F

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          A67L9336E-3.8

          1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM

          General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L0618, A67L9336 SRAMs integrate a 1M X 18, 512K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAM

          文件:252.34 Kbytes 頁(yè)數(shù):18 Pages

          AMICC

          聯(lián)笙電子

          技術(shù)參數(shù)

          • Configuration:

            512K x 36

          • VCC:

            3

          • Speed:

            153

          • Temp:

            I

          • Package:

            LQFP

          • Notes:

            Flow-Through

          • Available:

            EOL

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          更多A67L9336供應(yīng)商 更新時(shí)間2026-1-19 15:17:00
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