Universal Asynchronous Receiver/Transmitter

General Description The a6402 MegaCore function implements a universal asynchronous receiver/transmitter (UART), which provides an interface between a microprocessor and a serial communications channel. See Figure 1. Features ■ a6402 MegaCore function implementing a universal asynchronous r

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ALTERA

阿爾特

Universal Asynchronous Receiver/Transmitter

General Description\nThe a6402 MegaCore function implements a universal asynchronous receiver/transmitter (UART), which provides an interface between a microprocessor and a serial communications channel. See Figure 1. ■ a6402 MegaCore function implementing a universal asynchronous\n?? receiver/transmitter (UART)\n■ Optimized for FLEX? and MAX? architectures\n■ Uses approximately 162 FLEX logic elements (LEs)\n■ Programmable word length, stop bits, and parity\n■ Full duplex operation\n■ Includes status flags for p;

Intel

英特爾

IF Transceiver Subsystem

GENERAL DESCRIPTION The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation. It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS. The AD6402 integrates key functions, i

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AD

亞德諾

IF Transceiver Subsystem

GENERAL DESCRIPTION The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation. It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS. The AD6402 integrates key functions, i

文件：110.35 Kbytes 頁(yè)數(shù)：8 Pages

AD

亞德諾

IF Transceiver Subsystem

GENERAL DESCRIPTION The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation. It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS. The AD6402 integrates key functions, i

文件：110.35 Kbytes 頁(yè)數(shù)：8 Pages

AD

亞德諾