Programmable Slew rate for each output

Description The 9FGV0231 is a 2-output very low-power clock generator for PCIe Gen 1, 2, 3 and 4 Common Clocked (CC) applications. The device has 2 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off. Features/Benefits ? 1.8V operation;

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2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

Features/Benefits ? 1.8V operation; reduced power consumption ? OE# pins; support DIF power management ? LP-HCSL differential clock outputs; reduced power and board space ? Programmable Slew rate for each output; allows tuning for various line lengths ? Programmable output amplitude; allows

文件：673.86 Kbytes 頁數(shù)：17 Pages

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2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR

文件：224.27 Kbytes 頁數(shù)：15 Pages

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2-output 1.8 V PCIe Gen1-4 Clock Generator

The 9FGV0231 is a 2-output very low power clock generator for PCIe Gen1–4 Common Clocked (CC)?applications. The device has 2 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off. PCIe Gen1–4 CC-compliant\n1.8 V operation: reduced power consumption\nOE# pins: support DIF power management\nLP-HCSL differential clock outputs: reduced power and board space\nProgrammable slew rate for each output: allows tuning for various line lengths\nProgrammable output amplitude: allows tunin;

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絲?。?a target="_blank" title="Marking" href="/lot231al/marking.html">LOT231AL；Package：VFQFPN；2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

Features/Benefits ? 1.8V operation; reduced power consumption ? OE# pins; support DIF power management ? LP-HCSL differential clock outputs; reduced power and board space ? Programmable Slew rate for each output; allows tuning for various line lengths ? Programmable output amplitude; allows

文件：673.86 Kbytes 頁數(shù)：17 Pages

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瑞薩

絲?。?a target="_blank" title="Marking" href="/lot231al/marking.html">LOT231AL；Package：VFQFPN；2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

Features/Benefits ? 1.8V operation; reduced power consumption ? OE# pins; support DIF power management ? LP-HCSL differential clock outputs; reduced power and board space ? Programmable Slew rate for each output; allows tuning for various line lengths ? Programmable output amplitude; allows

文件：673.86 Kbytes 頁數(shù)：17 Pages

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瑞薩

絲?。?a target="_blank" title="Marking" href="/lot231al/marking.html">LOT231AL；Package：VFQFPN；2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

Features/Benefits ? 1.8V operation; reduced power consumption ? OE# pins; support DIF power management ? LP-HCSL differential clock outputs; reduced power and board space ? Programmable Slew rate for each output; allows tuning for various line lengths ? Programmable output amplitude; allows

文件：673.86 Kbytes 頁數(shù)：17 Pages

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瑞薩

絲印：LOT231AL；Package：VFQFPN；2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

Features/Benefits ? 1.8V operation; reduced power consumption ? OE# pins; support DIF power management ? LP-HCSL differential clock outputs; reduced power and board space ? Programmable Slew rate for each output; allows tuning for various line lengths ? Programmable output amplitude; allows

文件：673.86 Kbytes 頁數(shù)：17 Pages

RENESAS

瑞薩

2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR

文件：224.27 Kbytes 頁數(shù)：15 Pages

IDT

2-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

文件：281.97 Kbytes 頁數(shù)：16 Pages

IDT