4-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer with Zo = 33Ohms

Description The 9DBV0431 is a member of Renesas' SOC-Friendly 1.8V Very-Low-Power (VLP) PCIe family. It can also be used for 50M or 125M Ethernet Applications via software frequency selection. The device has 4 output enables for clock management, and 3 selectable SMBus addresses. Features/

文件：760.1 Kbytes 頁數(shù)：18 Pages

RENESAS

瑞薩

LP-HCSL outputs save 8 resistors; minimal board space and BOM cost

文件：213.59 Kbytes 頁數(shù)：17 Pages

ICST

HCSL compatible differential input

文件：213.59 Kbytes 頁數(shù)：17 Pages

IDT

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT

4-output 1.8V PCIe Zero-Delay/Fanout Clock Buffer

The 9DBV0431 is a 4-output very low power buffer for 100 MHz PCIe Gen1, Gen2 and Gen3 applications. It can also be used for 50M or 125M Ethernet Applications via software frequency selection. The device has 4 output enables for clock management. 1.8 V operation: minimal power consumption\nOE# pins: support DIF power management\nHCSL compatible differential input: can be driven by common clock sources\nLP-HCSL differential clock outputs: reduced power and board space\nProgrammable slew rate for each output: allows tuning for various line len;

Renesas

瑞薩

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT

4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer (ZDB/FOB)

文件：210.06 Kbytes 頁數(shù)：16 Pages

IDT