JESD204B Compliant Fanout Buffer and Divider

Description The 8V79S680 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B applications. It is designed as a high-performance clock and converter synchronization solution for wireless base station radio equipment boards with JESD204B subclass 0, 1, and 2 compliance. Th

文件：1.04824 Mbytes 頁(yè)數(shù)：46 Pages

RENESAS

瑞薩

JESD204B Compliant Fanout Buffer and Divider

文件：736.56 Kbytes 頁(yè)數(shù)：52 Pages

IDT

JESD204B Compliant Fanout Buffer and Divider

The 8V79S680 is a fully integrated, clock and SYSREF signal fanout?buffer for JESD204B applications. It is designed as a high-performance?clock and converter synchronization solution for wireless base station?radio equipment boards with JESD204B subclass 0, 1 and 2?compliance. The main function of t ? Supports high-speed, low phase noise converter clocks\n? Very low output noise floor: -158.8dBc/Hz noise floor (245.76MHz)\n? 4 output channels with a total of 16 differential outputs, organized?in:— 8 dedicated clock outputs— 8 outputs configurable as SYSREF outputs with individual?phase delay st;

Renesas

瑞薩

JESD204B-Compliant Fanout Buffer and Divider

文件：698.9 Kbytes 頁(yè)數(shù)：49 Pages

IDT

JESD204B-Compliant Fanout Buffer and Divider

文件：698.9 Kbytes 頁(yè)數(shù)：49 Pages

IDT

JESD204B Compliant Fanout Buffer and Divider

文件：736.56 Kbytes 頁(yè)數(shù)：52 Pages

IDT

JESD204B Compliant Fanout Buffer and Divider

文件：736.56 Kbytes 頁(yè)數(shù)：52 Pages

IDT

JESD204B-Compliant Fanout Buffer and Divider

文件：698.9 Kbytes 頁(yè)數(shù)：49 Pages

IDT

Package：64-VFQFN 裸露焊盤(pán)；包裝：卷帶（TR） 類(lèi)別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：JESD204B COMPLIANT FANOUT BUFFER

Renesas Electronics America Inc

Package：64-VFQFN 裸露焊盤(pán)；包裝：卷帶（TR） 類(lèi)別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：VFQFPN 9.00X9.00X0.90 MM, 0.50MM

Renesas Electronics America Inc