| 型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
Hand Crimp Tool for 1.50mm Pico-SPOX Female Crimp Terminals, 26-24 AWG, UL1061 Wires General Status Active Category Crimp Presses and Crimp Hand Tools Series 207129 Description Hand Crimp Tool for 1.50mm Pico- SPOX Female Crimp Terminals, 26-24 AWG, UL1061 Wires Comments See Tooling Specification (PDF) Above Function Crimp Geographic Area Global Level of Automation Man 文件：70.67 Kbytes 頁數(shù)：3 Pages | MOLEX 莫仕 | MOLEX | ||
Hand Crimp Tool for 1.50mm Pico-SPOX Female Crimp Terminals, 30-26 AWG, UL1061 and UL1571 General Status Active Category Crimp Presses and Crimp Hand Tools Series 207129 Description Hand Crimp Tool for 1.50mm Pico- SPOX Female Crimp Terminals, 30-26 AWG, UL1061 and UL1571 Comments See Tooling Specification (PDF) Above Function Crimp Geographic Area Global Level of Automatio 文件：70.71 Kbytes 頁數(shù)：3 Pages | MOLEX 莫仕 | MOLEX | ||
Hand Crimp Tool for 1.50mm Pico-SPOX Female Crimp Terminals, 30-26 AWG, UL1061 and UL1571 General Status Active Category Crimp Presses and Crimp Hand Tools Series 207129 Description Hand Crimp Tool for 1.50mm Pico- SPOX Female Crimp Terminals, 30-26 AWG, UL1061 and UL1571 Comments See Tooling Specification (PDF) Above Function Crimp Geographic Area Global Level of Automatio 文件：70.71 Kbytes 頁數(shù)：3 Pages | MOLEX 莫仕 | MOLEX | ||
絲?。?a target="_blank" title="Marking" href="/87421ail/marking.html">87421AIL；Package：SOIC；÷1/÷2 Differential-to-LVDS Clock Generator FEATURES ? One differential LVDS output ? One differential CLK, nCLK input pair ? CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum clock input frequency: 1GHz ? Translates any single ended input signal (LVCMOS, LVTTL, GTL) to LVDS 文件：408.84 Kbytes 頁數(shù)：16 Pages | RENESAS 瑞薩 | RENESAS | ||
絲?。?a target="_blank" title="Marking" href="/87421ail/marking.html">87421AIL；Package：SOIC；÷1/÷2 Differential-to-LVDS Clock Generator FEATURES ? One differential LVDS output ? One differential CLK, nCLK input pair ? CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum clock input frequency: 1GHz ? Translates any single ended input signal (LVCMOS, LVTTL, GTL) to LVDS 文件：408.84 Kbytes 頁數(shù)：16 Pages | RENESAS 瑞薩 | RENESAS | ||
絲印：ICS74208BIL；Package：VFQFN；2.5V Differential LVDS Clock Divider and Fanout Buffer 文件：298.22 Kbytes 頁數(shù)：19 Pages | IDT | IDT | ||
絲?。?a target="_blank" title="Marking" href="/ics74208bil/marking.html">ICS74208BIL；Package：VFQFN；2.5V Differential LVDS Clock Divider and Fanout Buffer 文件：298.22 Kbytes 頁數(shù)：19 Pages | IDT | IDT | ||
2.5V Differential LVDS Clock Divider and Fanout Buffer 文件：298.22 Kbytes 頁數(shù)：19 Pages | IDT | IDT | ||
PICO-SPOX 1.5 R-R 4CKT 100MM DISC Sn 文件：84.68 Kbytes 頁數(shù)：1 Pages | MOLEX 莫仕 | MOLEX | ||
2.0 WtB Crimp Rec Chain 561349000 文件：175.08 Kbytes 頁數(shù)：3 Pages | MOLEX 莫仕 | MOLEX |
技術(shù)參數(shù)
- 間距：
4.2mm
- 插針結(jié)構(gòu)：
2x1P
- 排數(shù)：
2
- 每排PIN數(shù)：
1
- 行距：
4.2mm
- 公母：
母型插口
- 安裝方式：
彎插
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
24+ |
5000 |
公司存貨 |
詢價 | ||||
8742 |
25+ |
92 |
92 |
詢價 | |||
WINBOND |
0714+ |
QFP-128 |
428 |
全新原裝 絕對有貨 |
詢價 | ||
WINBOND |
2016+ |
QFP |
9000 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
WINBOND |
23+ |
QFP |
5000 |
原裝正品,假一罰十 |
詢價 | ||
WINBOND |
24+ |
QFP |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價 | ||
WINBOND |
24+ |
PQFP128 |
25843 |
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強(qiáng)勢庫存! |
詢價 | ||
MOLEX |
24+/25+ |
30000 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 | |||
NUVOTON |
17+ |
QFP |
6200 |
100%原裝正品現(xiàn)貨 |
詢價 | ||
WINBOND |
24+ |
BGA |
5000 |
全現(xiàn)原裝公司現(xiàn)貨 |
詢價 |
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