Low Skew, 1-to-4 LVCMOS/ LVTTL-to-LVDS Fanout Buffer

Features ? Four differential LVDS output pairs ? Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications ? Maximum output frequency: 650MHz ? Translates LVCMOS/LVTTL input signals to LVDS levels ? Output skew: 40ps (maximum) ? Part-to-part skew: 500ps

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LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

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Low Skew,1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

The 8545 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS) the 8545 provides a low power, low noise, solution for distributing clock signals over ? Four differential LVDS output pairs\n? Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications\n? Maximum output frequency: 650MHz\n? Translates LVCMOS/LVTTL input signals to LVDS levels\n? Output skew: 40ps (maximum)\n? Part-to-part skew: 500ps (maximum)\n? ;

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Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

Features ? Four differential LVDS output pairs ? Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications ? Maximum output frequency: 650MHz ? Translates LVCMOS/LVTTL input signals to LVDS levels ? Output skew: 40ps (maximum) ? Part-to-part skew: 500ps

文件：413.67 Kbytes 頁數(shù)：14 Pages

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LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

Features ? Four differential LVDS output pairs ? Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications ? Maximum output frequency: 350MHz ? Translates LVCMOS/LVTTL input signals to LVDS levels ? Output skew: 60ps (maximum) ? Part-to-part skew: 450ps

文件：402.95 Kbytes 頁數(shù)：14 Pages

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絲?。?a target="_blank" title="Marking" href="/ics8545ag01l/marking.html">ICS8545AG01L；Package：TSSOP；Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

Features ? Four differential LVDS output pairs ? Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications ? Maximum output frequency: 650MHz ? Translates LVCMOS/LVTTL input signals to LVDS levels ? Output skew: 40ps (maximum) ? Part-to-part skew: 500ps

文件：413.67 Kbytes 頁數(shù)：14 Pages

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