| 型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
PCB connectors 1.27 mm Single row / double row / triple row Solder tail Ultraminiature PCB pin connectors, solder tail Grid spacing 1.27×1.27 mm Screw-machined pin ? 0.43 mm For corresponding receptacles see pages 10, 11 and 12 文件:39.64 Kbytes 頁數(shù):1 Pages | PREDIP | PREDIP | ||
M10X0.75 FEMALE THREAD DUST CAP W/ CHAIN FEATURES M8 connector pin configurations: 3 pin, 4 pin, 5 pin, 6 pin Non-removable Contacts Meets IP67/IP68 water proof requirements -40°C to +85°C Temperature Range Available as loose piece or as pre-made M8 cables MATERIALS SHELL: Brass-Nickel Plated or Stainless Steel INSULATOR: PBT-B 文件:55.69 Kbytes 頁數(shù):1 Pages | NORCOMP | NORCOMP | ||
Low Skew, 1-to-4, LVCMOS/LVTTL-to-LVDS Fanout Buffer General Description The 854105 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS), the 854105 provides a low power, low noise solution for distributing clock signals over controlled impedances of 100?. The 85410 文件:407.49 Kbytes 頁數(shù):14 Pages | RENESAS 瑞薩 | RENESAS | ||
Low Skew, 1-to-4, LVCMOS/ LVTTL-to-LVDS Fanout Buffer General Description The 854105I is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS), the 854105I provides a low power, low noise solution for distributing clock signals over controlled impedances of 100?. The 854 文件:474.56 Kbytes 頁數(shù):14 Pages | RENESAS 瑞薩 | RENESAS | ||
Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer FEATURES ? Two differential LVDS outputs ? One differential CLK, nCLK clock input ? CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum output frequency: 650MHz ? Translates any single ended input signal to LVDS levels with resistor 文件:386.95 Kbytes 頁數(shù):16 Pages | RENESAS 瑞薩 | RENESAS | ||
絲?。?a target="_blank" title="Marking" href="/ics54110ail/marking.html">ICS54110AIL;Package:VFQFN;2.5V Differential LVDS Clock Buffer General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char 文件:851.22 Kbytes 頁數(shù):21 Pages | IDT | IDT | ||
絲印:ICS54110AIL;Package:VFQFN;2.5V Differential LVDS Clock Buffer General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char 文件:851.22 Kbytes 頁數(shù):21 Pages | IDT | IDT | ||
絲?。?a target="_blank" title="Marking" href="/ics54110ail/marking.html">ICS54110AIL;Package:LQFP;2.5V Differential LVDS Clock Buffer General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char 文件:851.22 Kbytes 頁數(shù):21 Pages | IDT | IDT | ||
絲?。?a target="_blank" title="Marking" href="/ics54110ail/marking.html">ICS54110AIL;Package:LQFP;2.5V Differential LVDS Clock Buffer General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char 文件:851.22 Kbytes 頁數(shù):21 Pages | IDT | IDT | ||
絲?。?a target="_blank" title="Marking" href="/85411ail/marking.html">85411AIL;Package:SOIC;Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer FEATURES ? Two differential LVDS outputs ? One differential CLK, nCLK clock input ? CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum output frequency: 650MHz ? Translates any single ended input signal to LVDS levels with resistor 文件:386.46 Kbytes 頁數(shù):16 Pages | RENESAS 瑞薩 | RENESAS |
產(chǎn)品屬性
- 產(chǎn)品編號:
854
- 制造商:
3M
- 類別:
膠帶,粘合劑,材料 > 膠帶
- 包裝:
散裝
- 描述:
PAS WHT 3/4 X 72 YD
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
Abbatron/HHSmith |
新 |
5 |
全新原裝 貨期兩周 |
詢價(jià) | |||
Abbatron / HH Smith |
2022+ |
1 |
全新原裝 貨期兩周 |
詢價(jià) | |||
KEYSTONE |
25+ |
連接器 |
2963 |
就找我吧!--邀您體驗(yàn)愉快問購元件! |
詢價(jià) | ||
25+ |
SMD |
18000 |
原廠直接發(fā)貨進(jìn)口原裝 |
詢價(jià) | |||
IDT |
2016+ |
TSSOP20 |
3500 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價(jià) | ||
PHI |
24+ |
SSOP-20P |
250 |
現(xiàn)貨 |
詢價(jià) | ||
SDM |
3200 |
原裝長期供貨! |
詢價(jià) | ||||
ICSI |
07+ |
SSOP24 |
2145 |
全新原裝進(jìn)口自己庫存優(yōu)勢 |
詢價(jià) | ||
SAWTEK |
25+ |
N/A |
2000 |
百分百原裝正品 真實(shí)公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價(jià) | ||
TRIQUINT |
16+ |
NA |
8800 |
原裝現(xiàn)貨,貨真價(jià)優(yōu) |
詢價(jià) |
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