Differential Clock/Data Multiplexer

General Description The 831724 is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input

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Differential Clock/Data Multiplexer

文件：496.48 Kbytes 頁(yè)數(shù)：22 Pages

IDT

Differential Clock/Data Multiplexer

文件：496.48 Kbytes 頁(yè)數(shù)：22 Pages

IDT

Differential Clock/Data Multiplexer

文件：496.48 Kbytes 頁(yè)數(shù)：22 Pages

IDT

2:4 HCSL PCIe Clock Buffer

The 831724I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input signal is distributed to f ·2:1 differential clock/data multiplexer with fanout\n·Two selectable, differential inputs\n·Each differential input pair can accept the following levels: HCSL, LVDS, LVPECL\n·Four differential HCSL outputs\n·Maximum input/output clock frequency: 350MHz\n·Maximum input/output data rate: 700Mb/s (NRZ;

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Package：32-VFQFN 裸露焊盤；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC MUX/BUFFER 2:4 HCSL 32VFQFN

Renesas Electronics America Inc