CMOS High Performance Programmable DMA Controller

Description The 82C237 is a modified version of the 82C37A. The 82C237 is fully software and pin for pin compatible with the 82C37A but provides an additional mode for 16-bit DMA transfers, as well as enhanced speed. Each channel may be individually programmed for 8-bit or 16-bit data transfers

文件：158.77 Kbytes 頁(yè)數(shù)：25 Pages

INTERSIL

CAN controller interface

GENERAL DESCRIPTION The PCA82C250 is the interface between the CAN protocol controller and the physical bus. The device provides differential transmit capability to the bus and differential receive capability to the CAN controller. FEATURES ? Fully compatible with the “ISO 11898” standard ? Hi

文件：94.46 Kbytes 頁(yè)數(shù)：20 Pages

PHI

PHI

CAN transceiver for 24 V systems

General description The PCA82C251 is the interface between a CAN protocol controller and the physical bus. The device provides differential transmit capability to the bus and differential receive capability to the CAN controller. Features and benefits ■ Fully compatible with the “ISO 11898-24 V

文件：151 Kbytes 頁(yè)數(shù)：16 Pages

恩XP

Clock Generator and Ready Interface for 80C286 Processors

Features ? Generates System Clock for 80C286 Processors ? Generates System Reset Output from Schmitt Trigger Input - Improved Hysteresis ? Uses Crystal or External Signal for Frequency Source ? Dynamically Switchable between Two Input Frequencies ? Provides Local READY and MULTIBUS? READY

文件：605 Kbytes 頁(yè)數(shù)：11 Pages

RENESAS

瑞薩

Clock Generator and Ready Interface for 80C286 Processors

Description The Intersil 82C284 is a clock generator/driver which provides clock signals for 80C286 processors and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hysteresis

文件：72.18 Kbytes 頁(yè)數(shù)：11 Pages

INTERSIL

Clock Generator and Ready Interface for 80C286 Processors

Description The Intersil 82C284/883 is a clock generator/driver which provides clock signals for 80C286 processors and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hyster

文件：222.36 Kbytes 頁(yè)數(shù)：9 Pages

INTERSIL

Clock Generator and Ready Interface for 80C286 Processors

Description The Intersil 82C284/883 is a clock generator/driver which provides clock signals for 80C286 processors and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hyster

文件：222.36 Kbytes 頁(yè)數(shù)：9 Pages

INTERSIL

Clock Generator and Ready Interface for 80C286 Processors

Description The Intersil 82C284/883 is a clock generator/driver which provides clock signals for 80C286 processors and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hyster

文件：222.36 Kbytes 頁(yè)數(shù)：9 Pages

INTERSIL

BUS CONTROLLER FOR M80286 PROCESSORS

BUS CONTROLLER FOR M80286 PROCESSORS The Intel M82C288 Bus Controller is a 20-pin CHMOS III component for use in M80C286 microsystems. The M82C288 is fully compatible with its predecessor the HMOS M82288. The bus controller is fully static and supports a low power mode. The bus controller provide

文件：335.78 Kbytes 頁(yè)數(shù)：20 Pages

INTEL

英特爾

PROGRAMMABLE DMA CONTROLLER

GENERAL DESCRIPTION The MSM82C37B-5RS/GS/VJS, DMA (Direct Memory Access) controller is capable of high speed data transfer without CPU intervention and is used as a peripheral device in microcomputer systems. The device features four independent programmable DMA channels. Due to the use of sili

文件：301.23 Kbytes 頁(yè)數(shù)：34 Pages

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