絲印：7KL1282DPHI02；128 Mb HYPERRAM? self-refresh DRAM (PSRAM) HYPERBUS? interface, 1.8 V/3.0 V

Features ? Interface - HYPERBUS? interface - 1.8 V / 3.0 V interface support ? Single-ended clock (CK) - 11 bus signals ? Optional differential clock (CK, CK#) - 12 bus signals - Chip select (CS#) - 8-bit data bus (DQ[7:0]) - Hardware reset (RESET#) - Bidirectional read-write data strobe

文件：1.21628 Mbytes 頁數(shù)：62 Pages

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絲?。?strong>7KL1282DPHI02；128 Mb HYPERRAM? self-refresh DRAM (PSRAM) HYPERBUS? interface, 1.8 V/3.0 V

Features ? Interface - HYPERBUS? interface - 1.8 V / 3.0 V interface support ? Single-ended clock (CK) - 11 bus signals ? Optional differential clock (CK, CK#) - 12 bus signals - Chip select (CS#) - 8-bit data bus (DQ[7:0]) - Hardware reset (RESET#) - Bidirectional read-write data strobe

文件：1.21628 Mbytes 頁數(shù)：62 Pages

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128Mb HYPERRAM??self-refresh DRAM(PSRAM)

文件：1.22054 Mbytes 頁數(shù)：57 Pages

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