DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

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NSC

國半

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes 頁數(shù)：3 Pages

TI

德州儀器

Divide-by-Twelve Counters

The HD74LS92 contains four master-slave flip-flops and additional gating to provide a divide-by-six.

HITACHI

日立

Divide-by-Twelve Counters

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：85.07 Kbytes 頁數(shù)：7 Pages

HITACHIHitachi Semiconductor

日立日立公司

Ouadruple 2-input Positive NAND Gates

文件：6.85482 Mbytes 頁數(shù)：273 Pages

HITACHIHitachi Semiconductor

日立日立公司

DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS

文件：414.2 Kbytes 頁數(shù)：14 Pages

TI

德州儀器