Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

文件：78.37 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導(dǎo)體

Octal transceiver/register, non-inverting 3-State

DESCRIPTION The 74F646/74F646A and 74F648/74F648A transceivers/registers consist of bus transceiver circuits with 3–state outputs, D–type flip–flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus

文件：121.1 Kbytes 頁數(shù)：16 Pages

PHI

PHI

Octal Transceiver/Register with 3-STATE Outputs

文件：71.76 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

Octal Transceiver/Register with TRI-STATE Outputs

文件：216.07 Kbytes 頁數(shù)：12 Pages

NSC

國半

Octal Transceiver/Register with 3-STATE Outputs

General Description\nThese devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the app ■ Independent registers for A and B buses\n■ Multiplexed real-time and stored data\n■ 74F648 has inverting data paths\n■ 74F646/74F646B have non-inverting data paths\n■ 74F646B is a faster version of the 74F646\n■ 3-STATE outputs\n■ 300 mil slim DIP;

ONSEMI

安森美半導(dǎo)體

Octal transceiver/register, non-inverting 3-State

恩XP

Octal transceiver/register, non-inverting 3-State

DESCRIPTION The 74F646/74F646A and 74F648/74F648A transceivers/registers consist of bus transceiver circuits with 3–state outputs, D–type flip–flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus

文件：121.1 Kbytes 頁數(shù)：16 Pages

PHI

PHI

Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

文件：78.37 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導(dǎo)體

Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

文件：78.37 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導(dǎo)體

Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

文件：78.37 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導(dǎo)體