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    首頁 >74F544>規(guī)格書列表

    型號下載 訂購功能描述制造商 上傳企業(yè)LOGO

    74F544

    Octal Registered Transceiver

    General Description The 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either directi

    文件:57.98 Kbytes 頁數(shù):6 Pages

    FAIRCHILD

    仙童半導(dǎo)體

    74F544

    Octal registered transceiver, non-inverting 3-State

    DESCRIPTION The 74F543 and 74F544 Octal Registered Transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of in

    文件:119.39 Kbytes 頁數(shù):16 Pages

    PHI

    PHI

    PHI

    74F544

    Octal Registered Transceiver

    文件:186.54 Kbytes 頁數(shù):10 Pages

    NSC

    國半

    74F544

    Octal Registered Transceiver

    General Description\nThe 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction ■ 8-bit octal transceiver\n■ Back-to-back registers for storage\n■ Separate controls for data flow in each direction\n■ A outputs sink 24 mA, B outputs sink 64 mA;

    ONSEMI

    安森美半導(dǎo)體

    74F544

    Octal registered transceiver,inverting (3-State)

    恩XP

    恩XP

    74F544MSA

    Octal Registered Transceiver

    General Description The 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either directi

    文件:57.98 Kbytes 頁數(shù):6 Pages

    FAIRCHILD

    仙童半導(dǎo)體

    74F544SC

    Octal Registered Transceiver

    General Description The 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either directi

    文件:57.98 Kbytes 頁數(shù):6 Pages

    FAIRCHILD

    仙童半導(dǎo)體

    74F544SPC

    Octal Registered Transceiver

    General Description The 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either directi

    文件:57.98 Kbytes 頁數(shù):6 Pages

    FAIRCHILD

    仙童半導(dǎo)體

    74F544MSA

    Octal Registered Transceiver

    文件:186.54 Kbytes 頁數(shù):10 Pages

    NSC

    國半

    74F544MSAQB

    Octal Registered Transceiver

    文件:186.54 Kbytes 頁數(shù):10 Pages

    NSC

    國半

    詳細(xì)參數(shù)

    • 型號:

      74F544

    • 功能描述:

      總線收發(fā)器 Oct Registered Trans

    • RoHS:

    • 制造商:

      Fairchild Semiconductor

    • 邏輯類型:

      CMOS

    • 邏輯系列:

      74VCX

    • 每芯片的通道數(shù)量:

      16

    • 輸入電平:

      CMOS

    • 輸出電平:

      CMOS

    • 輸出類型:

      3-State

    • 高電平輸出電流:

      - 24 mA

    • 低電平輸出電流:

      24 mA

    • 傳播延遲時間:

      6.2 ns

    • 電源電壓-最大:

      2.7 V, 3.6 V

    • 電源電壓-最?。?/span>

      1.65 V, 2.3 V

    • 最大工作溫度:

      + 85 C

    • 封裝/箱體:

      TSSOP-48

    • 封裝:

      Reel

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    更多74F544供應(yīng)商 更新時間2026-1-22 10:21:00

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