8-bit serial-in parallel-out shift register

DESCRIPTION The 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must b

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PHI

PHI

8-bit serial-in parallel-out shift register

文件：88.56 Kbytes 頁數(shù)：10 Pages

恩XP

8-bit serial-in parallel-out shift register

DESCRIPTION\nThe 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must be co ? Gated serial data inputs\n? Typical shift frequency of 100MHz\n? Asynchronous Master Reset\n? Buffered clock and data inputs\n? Fully synchronous data transfer\n? Industrial temperature range available (–40 to +85 °C)\n?;

恩XP

Serial-In, Parallel-Out Shift Register

General Description The 74F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs

文件：58.62 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

Serial-In, Parallel-Out Shift Register

General Description The 74F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs

文件：58.62 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

Serial-In, Parallel-Out Shift Register

General Description The 74F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs

文件：58.62 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

Serial-In, Parallel-Out Shift Register

General Description The 74F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs

文件：58.62 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

8-bit serial-in parallel-out shift register

DESCRIPTION The 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must b

文件：94.24 Kbytes 頁數(shù)：10 Pages

PHI

PHI

8-bit serial-in parallel-out shift register

DESCRIPTION The 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must b

文件：94.24 Kbytes 頁數(shù)：10 Pages

PHI

PHI

Serial-In, Parallel-Out Shift Register

文件：75.1 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導體