| 型號(hào) | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is 文件:114.36 Kbytes 頁數(shù):10 Pages | ONSEMI 安森美半導(dǎo)體 | ONSEMI | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i 文件:104.16 Kbytes 頁數(shù):9 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of 文件:454.9 Kbytes 頁數(shù):11 Pages | STMICROELECTRONICS 意法半導(dǎo)體 | STMICROELECTRONICS | ||
Dual D-Type Flip Flop with Preset and Clear Features ? High speed: fmax = 180 MHz (typ.) at VCC = 5 V ? Low power dissipation: ICC = 4 μA (max) at Ta = 25°C ? Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) ? Symmetrical output impedance: |IOH| = IOL = 24 mA (min) 文件:437.13 Kbytes 頁數(shù):11 Pages | TOSHIBA 東芝 | TOSHIBA | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i 文件:104.16 Kbytes 頁數(shù):9 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is 文件:114.36 Kbytes 頁數(shù):10 Pages | ONSEMI 安森美半導(dǎo)體 | ONSEMI | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is 文件:114.36 Kbytes 頁數(shù):10 Pages | ONSEMI 安森美半導(dǎo)體 | ONSEMI | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i 文件:104.16 Kbytes 頁數(shù):9 Pages | FAIRCHILD 仙童半導(dǎo)體 | FAIRCHILD | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is 文件:114.36 Kbytes 頁數(shù):10 Pages | ONSEMI 安森美半導(dǎo)體 | ONSEMI | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is 文件:114.36 Kbytes 頁數(shù):10 Pages | ONSEMI 安森美半導(dǎo)體 | ONSEMI |
技術(shù)參數(shù)
- 類型:
D 型
- 輸出類型:
差分
- 元件數(shù):
2
- 每元件位數(shù):
1
- 時(shí)鐘頻率:
210MHz
- 不同 V,最大 CL 時(shí)的最大傳播延遲:
11ns @ 5V,50pF
- 觸發(fā)器類型:
正邊沿
- 電流 - 輸出高,低:
24mA,24mA
- 電壓 - 電源:
4.5 V ~ 5.5 V
- 電流 - 靜態(tài)(Iq):
20μA
- 輸入電容:
4.5pF
- 工作溫度:
-40°C ~ 85°C(TA)
- 安裝類型:
表面貼裝
- 封裝/外殼:
14-TSSOP(0.173\,4.40mm 寬)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
onsemi(安森美) |
25+ |
- |
21000 |
正規(guī)渠道,免費(fèi)送樣。支持賬期,BOM一站式配齊 |
詢價(jià) | ||
NS |
24+ |
DIP |
600 |
新 |
詢價(jià) | ||
NSC |
24+/25+ |
200 |
原裝正品現(xiàn)貨庫存價(jià)優(yōu) |
詢價(jià) | |||
MOT |
SOP3.9 |
400 |
正品原裝--自家現(xiàn)貨-實(shí)單可談 |
詢價(jià) | |||
FSC |
06+ |
SOIC |
1000 |
全新原裝 絕對(duì)有貨 |
詢價(jià) | ||
FAI |
24+ |
SOP-20 |
25843 |
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢庫存! |
詢價(jià) | ||
FAI |
88+ |
SOP-14 |
42 |
原裝現(xiàn)貨海量庫存歡迎咨詢 |
詢價(jià) | ||
25+ |
SOP |
2700 |
全新原裝自家現(xiàn)貨優(yōu)勢! |
詢價(jià) | |||
FAIRCHILD |
新 |
4 |
全新原裝 貨期兩周 |
詢價(jià) | |||
FSC |
24+ |
SMD |
20000 |
一級(jí)代理原裝現(xiàn)貨假一罰十 |
詢價(jià) |
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