16-Bit D-Type Flip-Flop with 3-STATE Outputs

General Description The ACT16374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit ope

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FAIRCHILD

仙童半導(dǎo)體

16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器

16-BIT D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS (NON INVERTED)

DESCRIPTION The 74ACT16374 is an advanced high-speed CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. This 16 bit D-Type Flip-Flop is controlled by two clock inputs (CK) and two output enable inputs (OE). The device can

文件：278.72 Kbytes 頁(yè)數(shù)：10 Pages

STMICROELECTRONICS

意法半導(dǎo)體

16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

文件：178.84 Kbytes 頁(yè)數(shù)：10 Pages

TI

德州儀器

16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

文件：522.809 Kbytes 頁(yè)數(shù)：13 Pages

TI

德州儀器

具有三態(tài)輸出的 16 位 D 類邊沿觸發(fā)觸發(fā)器

The SN54ACT16374 and 74ACT16374 are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working ? Members of the Texas Instruments Widebus? Family\n? Inputs Are TTL-Voltage Compatible\n? 3-State Bus-Driving True Outputs\n? Flow-Through Architecture Optimizes PCB Layout\n? Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise\n? EPIC? (Enhanced-Performance Implan;

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/act16374/marking.html">ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器

絲印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/act16374/marking.html">ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器

絲印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器