首頁(yè) >74ACT11074>規(guī)格書列表
| 型號(hào) | 下載 訂購(gòu) | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
74ACT11074 | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | |
74ACT11074 | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET 文件:81.99 Kbytes 頁(yè)數(shù):5 Pages | TI 德州儀器 | TI | |
74ACT11074 | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET 文件:888.23 Kbytes 頁(yè)數(shù):14 Pages | TI 德州儀器 | TI | |
74ACT11074 | 具有清零和預(yù)置端的雙路正邊沿觸發(fā)式 D 型觸發(fā)器 This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are trans ? Inputs Are TTL-Voltage Compatible \n? EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process \n? Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N) \n ? EPIC is a trademark of Texas Instruments Incorporated.; | TI 德州儀器 | TI | |
絲?。?a target="_blank" title="Marking" href="/act11074/marking.html">ACT11074;Package:SOIC;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/act11074/marking.html">ACT11074;Package:SOIC;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/at074/marking.html">AT074;Package:SSOP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/at074/marking.html">AT074;Package:SSOP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/74act11074n/marking.html">74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/74act11074n/marking.html">74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件:664.34 Kbytes 頁(yè)數(shù):18 Pages | TI 德州儀器 | TI |
技術(shù)參數(shù)
- Technology Family:
ACT
- Supply voltage (Min) (V):
4.5
- Supply voltage (Max) (V):
5.5
- Input type:
TTL-Compatible CMOS
- Output type:
Push-Pull
- Clock Frequency (Max) (MHz):
100
- IOL (Max) (mA):
24
- IOH (Max) (mA):
-24
- ICC (Max) (uA):
40
- Features:
Balanced outputs
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TMS |
06+ |
SOIC |
1000 |
全新原裝 絕對(duì)有貨 |
詢價(jià) | ||
TI |
24+ |
SOP |
17 |
詢價(jià) | |||
TI德州儀器 |
22+ |
24000 |
原裝正品現(xiàn)貨,實(shí)單可談,量大價(jià)優(yōu) |
詢價(jià) | |||
TEXAS |
23+ |
SOIC |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | ||
TI |
24+ |
原廠封裝 |
1500 |
原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
TEXASINSTRUMENTS |
23+ |
NA |
1111 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
TEXAS |
18+ |
SOIC |
32831 |
全新原裝現(xiàn)貨,可出樣品,可開增值稅發(fā)票 |
詢價(jià) | ||
Texas Instruments |
24+ |
14-SOIC(0.154 |
56300 |
詢價(jià) | |||
TEXASINSTRUMENTS |
2447 |
NA |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) |
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