| 型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
74ACT109 | Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti 文件：100.04 Kbytes 頁數(shù)：9 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | |
74ACT109 | Dual JK Positive Edge??riggered Flip??lop The MC74AC109/74ACT109 consists of two high?speed completely independent transition clocked JK flip?flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip?flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J 文件：233.33 Kbytes 頁數(shù)：9 Pages | ONSEMI 安森美半導體 | ONSEMI | |
74ACT109 | Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes 頁數(shù)：12 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | |
Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti 文件：100.04 Kbytes 頁數(shù)：9 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | ||
Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav 文件：349.95 Kbytes 頁數(shù)：12 Pages | ONSEMI 安森美半導體 | ONSEMI | ||
Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti 文件：100.04 Kbytes 頁數(shù)：9 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | ||
Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav 文件：349.95 Kbytes 頁數(shù)：12 Pages | ONSEMI 安森美半導體 | ONSEMI | ||
Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes 頁數(shù)：12 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | ||
Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes 頁數(shù)：12 Pages | FAIRCHILD 仙童半導體 | FAIRCHILD | ||
IC FF JK TYPE DUAL 1BIT 16TSSOP | ONSEMI 安森美半導體 | ONSEMI |
技術(shù)參數(shù)
- 類型：
JK 型
- 輸出類型：
差分
- 元件數(shù)：
2
- 每元件位數(shù)：
1
- 時鐘頻率：
210MHz
- 不同 V，最大 CL 時的最大傳播延遲：
11ns @ 5V，50pF
- 觸發(fā)器類型：
正邊沿
- 電流 - 輸出高，低：
24mA，24mA
- 電壓 - 電源：
4.5 V ~ 5.5 V
- 電流 - 靜態(tài)（Iq)：
20μA
- 輸入電容：
4.5pF
- 工作溫度：
-40°C ~ 85°C（TA）
- 安裝類型：
表面貼裝
- 封裝/外殼：
16-TSSOP（0.173\，4.40mm 寬）
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
24+ |
DIP |
25 |
新 |
詢價 | |||
FAIR |
24+/25+ |
104 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 | |||
25+ |
SOP |
2700 |
全新原裝自家現(xiàn)貨優(yōu)勢! |
詢價 | |||
FAI |
24+ |
SMD |
20000 |
一級代理原裝現(xiàn)貨假一罰十 |
詢價 | ||
MICROSS/On Semiconductor |
24+ |
- |
56300 |
一級代理/放心采購 |
詢價 | ||
MICROSS/ON |
25+ |
IC |
25 |
就找我吧!--邀您體驗愉快問購元件! |
詢價 | ||
Fairchild/Micross Components |
22+ |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價 | |||
FAI |
2023+環(huán)保現(xiàn)貨 |
SOP3.9 |
93 |
專注軍工、汽車、醫(yī)療、工業(yè)等方案配套一站式服務(wù) |
詢價 | ||
Fairchild |
23+ |
33500 |
詢價 | ||||
HARRIS/哈里斯 |
24+ |
NA |
990000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 |
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