Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：104.3 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：307.36 Kbytes 頁數(shù)：10 Pages

FAIRCHILD

仙童半導(dǎo)體

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：307.36 Kbytes 頁數(shù)：10 Pages

FAIRCHILD

仙童半導(dǎo)體

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：307.36 Kbytes 頁數(shù)：10 Pages

FAIRCHILD

仙童半導(dǎo)體

Quad 2-Input NAND Gate

Description The AC00/ACT00 contains four, 2?input NAND gates. Features ? ICC Reduced by 50 ? Outputs Source/Sink 24 mA ? ACT00 Has TTL?Compatible Inputs

文件：258.709 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導(dǎo)體

Advanced CMOS TTL Input

Features: ? Inputs directly accept TTL ? Outputs directly interface CMOS, NMOS and TTL ? Outputs Source/Sink 24 mA ? Low Input Current: 1μA ? Lower power alternative to bipolar logic ? Functionally compatible with bipolar 74LS00 ? Upgrade for 74HCT00.

文件：369.15 Kbytes 頁數(shù)：5 Pages

SS

QUAD 2-INPUT NAND GATE

DESCRIPTION The ACT00 is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. ■ HIGH SPEED: tPD

文件：67.27 Kbytes 頁數(shù)：7 Pages

STMICROELECTRONICS

意法半導(dǎo)體

Quad 2-I nput NAND Gates with LSTTL compatible inputs in bare die form

Description The 54ACT00 quad 2-input NAND gates is fabricated on a 1.5μm advanced CMOS process combining high speed LSTTL performance with CMOS low power. The device consists of x4 independent 2-input NAND gates performing the Boolean function Y = A ? B or Y = A + B. Internal circuitry compr

文件：407.2 Kbytes 頁數(shù)：5 Pages

SS

Advanced CMOS TTL Input

Features: ? Inputs directly accept TTL ? Outputs directly interface CMOS, NMOS and TTL ? Outputs Source/Sink 24 mA ? Low Input Current: 1μA ? Functionally compatible with bipolar 74LS00 ? Performance improvement versus 74HCT00 ? Lower power alternative to bipolar logic.

文件：378.3 Kbytes 頁數(shù)：5 Pages

SS

QUAD 2-INPUT NAND GATE

文件：185.87 Kbytes 頁數(shù)：8 Pages

STMICROELECTRONICS

意法半導(dǎo)體