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                >74AC11074>規(guī)格書列表
                
    
            
    
                
    
                    
    型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
    
                    
    74AC11074
    DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074
    DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    文件：92.77 Kbytes 頁數(shù)：6 Pages
    TI
    德州儀器
    

    74AC11074
    DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    文件：676.46 Kbytes 頁數(shù)：15 Pages
    TI
    德州儀器
    

    74AC11074
    具有清零和預(yù)置端的雙路正邊沿觸發(fā)式 D 型觸發(fā)器
    This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input that meets the setup-time requirements are tr  ? Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise \n? 500-mA Typical Latch-Up Immunity at 125°C \n? Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (N) \n  ? EPIC is a trademark of Texas Instru;
    TI
    德州儀器
    

    74AC11074D
    絲印：AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074DR
    絲?。?a target="_blank" title="Marking" href="/ac11074/marking.html">AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074DR.A
    絲?。?a target="_blank" title="Marking" href="/ac11074/marking.html">AC11074；Package：SOIC；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074N
    絲?。?a target="_blank" title="Marking" href="/74ac11074n/marking.html">74AC11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074N.A
    絲?。?a target="_blank" title="Marking" href="/74ac11074n/marking.html">74AC11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    74AC11074PWR
    絲印：AE074；Package：TSSOP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
    
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-μm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 3
    文件：612.2 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Technology Family：
      AC
    • Supply voltage (Min) (V)：
      3
    • Supply voltage (Max) (V)：
      5.5
    • Input type：
      Standard CMOS
    • Output type：
      Push-Pull
    • Clock Frequency (Max) (MHz)：
      125
    • IOL (Max) (mA)：
      24
    • IOH (Max) (mA)：
      -24
    • ICC (Max) (uA)：
      40
    • Features：
      Balanced outputs
    
            
    
        
    
            
    供應(yīng)商型號品牌批號封裝庫存備注價格
    
                
    



    TI德州儀器
    		

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    TI
    		

    24+
    		

    SOIC/3.9mm/2
    		

    21322
    		

    公司原廠原裝現(xiàn)貨假一罰十!特價出售!強(qiáng)勢庫存!
    		
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