9-bit dual latch transceiver with 8-bit parity generator/checker 3-State

DESCRIPTION The 74ABT899 is a 9-bit to 9-bit parity transceiver with separate transparent latches for the A bus and B bus. Either bus can generate or check parity. FEATURES ? Symmetrical (A and B bus functions are identical) ? Selectable generate parity or ”feed-through” parity for A-to-B

文件：123.08 Kbytes 頁數(shù)：16 Pages

PHI

PHI

9-Bit Latchable Transceiver with Parity Generator/Checker

General Description The ABT899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data busses in either direction. The ABT899 features independent latch enables for the A-to-B direct

文件：128.74 Kbytes 頁數(shù)：16 Pages

FAIRCHILD

仙童半導體

9-Bit Latchable Transceiver with Parity Generator/Checker

General Description The ABT899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data busses in either direction. The ABT899 features independent latch enables for the A-to-B direct

文件：128.74 Kbytes 頁數(shù)：16 Pages

FAIRCHILD

仙童半導體

9-Bit Latchable Transceiver with Parity Generator/Checker

General Description The ABT899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data busses in either direction. The ABT899 features independent latch enables for the A-to-B direct

文件：128.74 Kbytes 頁數(shù)：16 Pages

FAIRCHILD

仙童半導體