絲?。?strong>65LVDS150；Package：TSSOP；MuxIt? PLL FREQUENCY MULTIPLIER

FEATURES · A Member of the MuxIt? Serializer- Deserializer Building-Block Chip Family · Pin Selectable Frequency Multiplier Ratios Between 4 and 40 · Input Clock Frequencies From 5 to 50 MHz · Multiplied Clock Frequencies up to 400 MHz · Internal Loop Filters and Low PLL-Jitter of 20 ps R

文件：302.05 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲印：65LVDS150；Package：TSSOP；MuxIt? PLL FREQUENCY MULTIPLIER

FEATURES · A Member of the MuxIt? Serializer- Deserializer Building-Block Chip Family · Pin Selectable Frequency Multiplier Ratios Between 4 and 40 · Input Clock Frequencies From 5 to 50 MHz · Multiplied Clock Frequencies up to 400 MHz · Internal Loop Filters and Low PLL-Jitter of 20 ps R

文件：302.05 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲?。?strong>65LVDS150；Package：TSSOP；MuxIt? PLL FREQUENCY MULTIPLIER

FEATURES · A Member of the MuxIt? Serializer- Deserializer Building-Block Chip Family · Pin Selectable Frequency Multiplier Ratios Between 4 and 40 · Input Clock Frequencies From 5 to 50 MHz · Multiplied Clock Frequencies up to 400 MHz · Internal Loop Filters and Low PLL-Jitter of 20 ps R

文件：302.05 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲印：65LVDS150；Package：TSSOP；MuxIt? PLL FREQUENCY MULTIPLIER

FEATURES · A Member of the MuxIt? Serializer- Deserializer Building-Block Chip Family · Pin Selectable Frequency Multiplier Ratios Between 4 and 40 · Input Clock Frequencies From 5 to 50 MHz · Multiplied Clock Frequencies up to 400 MHz · Internal Loop Filters and Low PLL-Jitter of 20 ps R

文件：302.05 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲印：65LVDS150；Package：TSSOP；MuxIt? PLL FREQUENCY MULTIPLIER

FEATURES · A Member of the MuxIt? Serializer- Deserializer Building-Block Chip Family · Pin Selectable Frequency Multiplier Ratios Between 4 and 40 · Input Clock Frequencies From 5 to 50 MHz · Multiplied Clock Frequencies up to 400 MHz · Internal Loop Filters and Low PLL-Jitter of 20 ps R

文件：302.05 Kbytes 頁數(shù)：19 Pages

TI

德州儀器