5P35021中文資料VersaClock? 3S Programmable Clock Generator數(shù)據(jù)手冊(cè)Renesas規(guī)格書

描述 Description

The 5P35021 is a VersaClock programmable clock generator?and is designed for low power, consumer, and high?performance PCI Express applications.?The 5P35021 device?is a three PLL architecture design, and each PLL is?individually programmable and allowing for up to five unique frequency outputs.?The 5P35021 has built-in unique features such as Proactive?Power Saving (PPS), Performance-Power Balancing (PPB),?Overshoot Reduction Technology (ORT) and Extreme Low?Power DCO. An internal OTP memory allows the user to store?the configuration in the device without programming after?power up, then program the 5P35021 again through the I2C?interface.

特性 Features

? Configurable OE pin function as OE, PD#, PPS or DFC?control function
? Configurable PLL bandwidth/minimizes jitter peaking
? PPS: Proactive Power Saving features save power during?the end device power down mode
? PPB: Performance- Power Balancing feature allows?minimum power consumption base on required?performance
? DFC: Dynamic Frequency Control feature allows up to 4?difference frequencies switch dynamically
? Spread Spectrum clock support to lower system EMI
? I2C interface
? Also supports crystal input
? Supported by Timing Commander? ?software tool
? Available in AEC-Q100 qualified, Grade 2 (-40°C to +105°C) version

應(yīng)用 Application

? AI Industrial Robotics and Robotic Communication Solution
? 工業(yè)條碼掃描儀
? 適用于安全系統(tǒng)的語音/面部識(shí)別解決方案
? 采用 RZ/G2E 的模組系統(tǒng) (SoM) 解決方案