絲印：59；Package：SOT886；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected dir

文件：280.81 Kbytes 頁(yè)數(shù)：19 Pages

NEXPERIA

安世

絲?。?strong>59；Package：SOT1115；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected dir

文件：280.81 Kbytes 頁(yè)數(shù)：19 Pages

NEXPERIA

安世

絲?。?strong>59；Package：SOT1202；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected dir

文件：280.81 Kbytes 頁(yè)數(shù)：19 Pages

NEXPERIA

安世

絲印：59；Package：SOT363-2；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected dir

文件：280.81 Kbytes 頁(yè)數(shù)：19 Pages

NEXPERIA

安世

絲?。?strong>59；Package：TSSOP6；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97-Q100 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connecte

文件：235.51 Kbytes 頁(yè)數(shù)：15 Pages

NEXPERIA

安世

絲?。?strong>59；Package：SOT1255-2；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected dir

文件：280.81 Kbytes 頁(yè)數(shù)：19 Pages

NEXPERIA

安世

絲印：59；Package：SOD523；Zener Diode

Features ● High reliability ● Very sharp reverse characteristic ● Low reverse current level ● Zener Voltage 2.4V~47V

文件：2.67073 Mbytes 頁(yè)數(shù)：5 Pages

SAMYANG

三陽(yáng)電子

絲?。?strong>59；Package：SOT23；Voltage regulator diodes

1. General description Low-power voltage regulator diodes in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package. The diodes are available in the normalized E24 ±1 (BZX84-A), ±2 (BZX84-B) and approximately ±5 (BZX84-C) tolerance range. The series includes 37 breakdown volt

文件：324 Kbytes 頁(yè)數(shù)：14 Pages

NEXPERIA

安世

絲印：59；Package：SC-59；PNP resistor-equipped transistors; R1 = 22 kΩ, R2 = open

FEATURES ?Built-in bias resistors ?Simplified circuit design ?Reduction of component count ?Reduced pick and place costs. APPLICATIONS ?General purpose switching and amplification ?Inverter and interface circuits ?Circuit driver.

文件：403.41 Kbytes 頁(yè)數(shù)：15 Pages

NEXPERIA

安世

絲?。?strong>59；Low Capacitance RailClamp? 2-Line Surge and ESD Protection

Description RClamp?0592PWQ is specifically designed to provide secondary surge and ESD protection on high-speed ports. RClamp0592PWQ integrates low capacitance, surge-rated steering diodes with a high power transient voltage suppressor (TVS). The TVS utilizes snap-back or “crow-bar” technolo

文件：1.11492 Mbytes 頁(yè)數(shù)：11 Pages

SEMTECH

先之科