Low additive phase jitter RMS

文件：222.31 Kbytes 頁(yè)數(shù)：12 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

文件：153.45 Kbytes 頁(yè)數(shù)：9 Pages

IDT

Low Skew 1 to 4 Clock Buffer

The 551S is a low cost, high-speed single input to four output LVCMOS clock buffer. The 551S has best in class Additive Phase Jitter of sub 50 fsec. ? Low additive phase jitter RMS: 50 fs\n? Low cost clock buffer\n? Input / Output clock frequency up to 200 MHz\n? Ideal for networking clocks\n? Output Enable mode tri-states outputs\n? Extended temperature range (-40°C to +105°C);

Renesas

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Package：8-UFDFN；包裝：管件 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：COL 2.00X2.00X0.50 MM, 0.50MM PI

Renesas Electronics America Inc

Package：8-SOIC（0.154"，3.90mm 寬）；包裝：托盤(pán) 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC CLOCK BUFFER 1:4 8SOIC

Renesas Electronics America Inc