NON-INV OCTAL TRANSPARENT LATCH

The IDT 54FCT573T is an octal transparent latch with 3-state outputs and is intended for bus oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is high. When LE is low, the data that meets the set-up time is latched. The 54FCT573T operates at -55C to +125C. ( Std., A, and C speeds\nLow input and output leakage <1 uA (max.)\nCMOS power levels\nTrue TTL input and output compatibility:– VOH = 3.3V (typ.)\n– VOL = 0.3V (typ.)\nHigh Drive outputs (-15mA IOH, 48mA IOL)\nMeets or exceeds JEDEC standard 18 specifications\nMilitary product compliant to MIL-STD-88;

Renesas

瑞薩

Package：20-CDIP（0.300"，7.62mm）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 鎖存器 描述：IC TRANSP LATCH OCTAL 20CERDIP

Renesas Electronics America Inc

Package：20-LCC；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 鎖存器 描述：IC TRANSP LATCH OCTAL 20LCC

Renesas Electronics America Inc

8-BIT LATCHES WITH 3-STATE OUTPUTS

文件：311.73 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

8-BIT LATCHES WITH 3-STATE OUTPUTS

文件：687.57 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

8-BIT LATCHES WITH 3-STATE OUTPUTS

Function and Pinout Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation ESD Protection Exceeds JESD 22 – 2000-V Hu

文件：246.08 Kbytes 頁數(shù)：13 Pages

TI

德州儀器