DUAL LVCMOS / LVTTL-TO DIFFERENTIAL

GENERAL DESCRIPTION The ICS85222-01 is a Dual LVCMOS / LVTTL-to-Differential HSTL translator and a member of the HiPerClocks? family of High Performance Clock Solutions from ICS. The ICS85222-01 has two single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels a

文件：154.03 Kbytes 頁數(shù)：13 Pages

ICST

DUAL LVCMOS / LVTTL-TO DIFFERENTIAL

GENERAL DESCRIPTION The ICS85222-01 is a Dual LVCMOS / LVTTL-to-Differential HSTL translator and a member of the HiPerClocks? family of High Performance Clock Solutions from ICS. The ICS85222-01 has two single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels a

文件：154.03 Kbytes 頁數(shù)：13 Pages

ICST

絲?。?a target="_blank" title="Marking" href="/5222a01l/marking.html">5222A01L；Package：SOIC；Dual LVCMOS / LVTTL-to-Differential HSTL Translator

FEATURES ? Two differential HSTL outputs ? CLK0, CLK1 LVCMOS/LVTTL clock inputs ? CLK0 and CLK1 can accept the following input levels: LVCMOS or LVTTL ? Maximum output frequency: 350MHz ? Part-to-part skew: 375ps (maximum) ? Propagation delay: 1075ps (maximum) ? VOH: 1.4V (maximum) ? Full

文件：390.59 Kbytes 頁數(shù)：15 Pages

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瑞薩

絲?。?a target="_blank" title="Marking" href="/5222a01l/marking.html">5222A01L；Package：SOIC；Dual LVCMOS / LVTTL-to-Differential HSTL Translator

FEATURES ? Two differential HSTL outputs ? CLK0, CLK1 LVCMOS/LVTTL clock inputs ? CLK0 and CLK1 can accept the following input levels: LVCMOS or LVTTL ? Maximum output frequency: 350MHz ? Part-to-part skew: 375ps (maximum) ? Propagation delay: 1075ps (maximum) ? VOH: 1.4V (maximum) ? Full

文件：390.59 Kbytes 頁數(shù)：15 Pages

RENESAS

瑞薩