MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

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MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7303 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in ti

文件：39.71 Kbytes 頁數(shù)：4 Pages

DATADELAY