3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

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瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

3.3 VOLT ZERO DELAY CLOCK MULTIPLIER

Features ? Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency ? Distributes one clock input to two banks of four outputs ? Separate output enable for each output bank ? External feedback (FBK) pin is used to synchronize the outputs to the clo

文件：891.3 Kbytes 頁數：18 Pages

RENESAS

瑞薩

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：托盤 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC CLK MULT ZD 3.3V STD 16-SOIC

Renesas Electronics America Inc

Package：16-SOIC（0.154"，3.90mm 寬）；包裝：管件 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC CLOCK MULT ZD STD DRV 16-SOIC

Renesas Electronics America Inc