Low Power Dual Parity Checker/Generator

General Description The 100360 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs (Ia or Ib) has the shorter through-put delay and is therefore preferred as the expansion input for generating parity for

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Inductive Sensor

Features ■Threaded barrel, M8 x 1 ■Stainless steel, 1.4427 SO ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■M12 x 1 male connector ■ATEX category II 1 G, Ex zone 0 ■ATEX category II 1 D, Ex zone 20 ■SIL2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1 wi

文件：425.06 Kbytes 頁數(shù)：4 Pages

TURCKTurck, Inc.

圖爾克德國圖爾克集團公司

Low Power Dual 8-Input Multiplexer

General Description The 100363 is a dual 8-input multiplexer. The Data Select (Sn) inputs determine which bit (An and Bn) will be presented at the outputs (Za and Zb respectively). The same bit (0–7) will be selected for both the Za and Zb output. All inputs have 50 k? pull-down resistors. Featu

文件：74.16 Kbytes 頁數(shù)：7 Pages

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Low Power Dual 8-Input Multiplexer

General Description The 100363 is a dual 8-input multiplexer. The Data Select (Sn) inputs determine which bit (An and Bn) will be presented at the outputs (Za and Zb respectively). The same bit (0–7) will be selected for both the Za and Zb output. All inputs have 50 k? pull-down resistors. Featu

文件：74.16 Kbytes 頁數(shù)：7 Pages

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Low Power Dual 8-Input Multiplexer

General Description The 100363 is a dual 8-input multiplexer. The Data Select (Sn) inputs determine which bit (An and Bn) will be presented at the outputs (Za and Zb respectively). The same bit (0–7) will be selected for both the Za and Zb output. All inputs have 50 k? pull-down resistors. Featu

文件：74.16 Kbytes 頁數(shù)：7 Pages

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仙童半導體

Low Power Dual 8-Input Multiplexer

General Description The 100363 is a dual 8-input multiplexer. The Data Select (Sn) inputs determine which bit (An and Bn) will be presented at the outputs (Za and Zb respectively). The same bit (0–7) will be selected for both the Za and Zb output. All inputs have 50 k? pull-down resistors. Featu

文件：74.16 Kbytes 頁數(shù)：7 Pages

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Low Power 16-Input Multiplexer

General Description The 100364 is a 16-input multiplexer. Data paths are controlled by four Select lines (S0–S3). Their decoding is shown in the Truth Table. Output data polarity is the same as the selected input data. All inputs have 50 k? pull-down resistors. Features ■ 35 power reduction of

文件：72.51 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導體

Inductive Sensor

Features ■Threaded barrel, M8 x 1 ■Stainless steel, 1.4427 SO ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■M12 x 1 male connector ■ATEX category II 1 G, Ex zone 0 ■ATEX category II 1 D, Ex zone 20 ■SIL2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1 wi

文件：1.01158 Mbytes 頁數(shù)：4 Pages

TURCKTurck, Inc.

圖爾克德國圖爾克集團公司

Low Power 16-Input Multiplexer

General Description The 100364 is a 16-input multiplexer. Data paths are controlled by four Select lines (S0–S3). Their decoding is shown in the Truth Table. Output data polarity is the same as the selected input data. All inputs have 50 k? pull-down resistors. Features ■ 35 power reduction of

文件：72.51 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導體

Low Power 16-Input Multiplexer

General Description The 100364 is a 16-input multiplexer. Data paths are controlled by four Select lines (S0–S3). Their decoding is shown in the Truth Table. Output data polarity is the same as the selected input data. All inputs have 50 k? pull-down resistors. Features ■ 35 power reduction of

文件：72.51 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導體