Wi-Fi 6E Tri-Radio Indoor Access Point with Support for Multiple Extreme Operating Systems

Unlike other access points that scan only part-time, the AP5010 features a dedicated tri-frequency sensor that monitors for rogue devices full time, eliminating the risk of vulnerability and attacks. This tri-radio AP is capable of multiple operating modes, optimizing for maximum performance witho

文件：655.08 Kbytes 頁數(shù)：13 Pages

EXTREMENETWORKS

EPIC? H-B 10 SGR

Description ? The smallest housing with single and double lever. ? The right housing is available for every application

文件：138.23 Kbytes 頁數(shù)：2 Pages

LAPP

纜普

Low Power 8-Bit Shift Register

General Description The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs (Pn) and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup time before the positive-going

文件：94.96 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Shift Register

General Description The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs (Pn) and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup time before the positive-going

文件：94.96 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Shift Register

General Description The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs (Pn) and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup time before the positive-going

文件：94.96 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Shift Register

General Description The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs (Pn) and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup time before the positive-going

文件：94.96 Kbytes 頁數(shù)：9 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Latch

General Description The 100343 contains eight D-type latches, individual inputs, (Dn), outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present

文件：73.67 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Latch

General Description The 100343 contains eight D-type latches, individual inputs, (Dn), outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present

文件：73.67 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Latch

General Description The 100343 contains eight D-type latches, individual inputs, (Dn), outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present

文件：73.67 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導體

Low Power 8-Bit Latch

General Description The 100343 contains eight D-type latches, individual inputs, (Dn), outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present

文件：73.67 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

仙童半導體